收藏本站
EFCOP Operation
10.3.1 EFCOP Operation Summary
The EFCOP is very easy to use. To define the type of filtering to perform, you need only set the
following registers (the settings in the FDCH and FACR are optional) and then enable the
EFCOP by setting FCSR[FEN]:
FCNT
FDBA
FCBA
FCSR
Polling, DMA, or interrupts can then be used to write data to the FDIR and read data from the
FDOR. As Table 10-2 shows, the EFCOP operates in many different modes based on the settings
of the control registers. However, the EFCOP performs only two basic types of processing, FIR
filter type and IIR filter type processing. Various sub-options are available with each filter type,
as described in the following sections.
10.3.2 EFCOP Initialization
Before the first sample is processed, the EFCOP filter must be initialized; that is, the input
samples for times before n = 0 (assuming that time starts at 0) must be loaded into the FDM. The
method by which this is done depends on the Filter Type selected.
10.3.2.1 FIR Initialization
The number of samples needed to initialize the filter is the number of filter coefficients minus
one. To select Initialization mode, clear the FCSR[FPRC] bit. If FCSR[FPRC] is set,
initialization is disabled and the EFCOP assumes that the core wrote the initial input values to the
FDM before the EFCOP was enabled. Thus, the first value written to FDIR is the first sample to
be filtered.
If FCSR[FPRC] is clear, initialization mode is enabled and the EFCOP initializes the FDM by
receiving the number of coefficients minus one samples through the FDIR. After samples are
loaded, the next value written to the FDIR is the first sample to be filtered.
10.3.2.2 IIR Initialization
Initialization is always disabled with the IIR filter type, and the FCSR[FPRC] bit is ignored.
Thus, the DSP56300 core must write the initial input values before the EFCOP is enabled. The
first value written to FDIR is always the first sample to be filtered.
DSP56311 Reference Manual, Rev. 2
Freescale Semiconductor
10-7
发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

*型号 *数量 厂商 批号 封装
添加更多采购

我的联系方式

*
*
*
相关PDF资料
DSPAUDIOEVMMB1E BOARD MOTHER DSP563XX
DSPIC30F2010 DEVELOPMENT KIT KIT DEV EMBEDDED C
DSTRM-KT-0181A DSTREAM DEBUG AND TRACE UNIT
DSUT1CSU SURGE SUPPR NETWORK W/GROUND
DTEL2 SURGE SUPPRESSOR PHONE RJ11/RJ45
DV003001 PROGRAMMER PICSTART PLUS 16C/17C
DV164035 MPLAB ICD3 IN-CIRC DEBUGGER
DV164039 KIT DEV PIC24FJ256DA210
相关代理商/技术参数
DSP56311EVMIG_D 制造商:未知厂家 制造商全称:未知厂家 功能描述:DSP56311EVMIG DSP56311EVM Sample Code
DSP56311EVMUM 制造商:未知厂家 制造商全称:未知厂家 功能描述:DSP56311 Evaluation Module Hardware Reference Manual
DSP56311FACT 制造商:未知厂家 制造商全称:未知厂家 功能描述:DSP56311 Higher performance programmable DSP for demanding voice and data applications
DSP56311UM 制造商:未知厂家 制造商全称:未知厂家 功能描述:DSP56311 24-Bit Digital Signal Processor Users Manual
DSP56311UMAD 制造商:未知厂家 制造商全称:未知厂家 功能描述:DSP56311 Users Manual Addendum
DSP56311VF150 功能描述:数字信号处理器和控制器 - DSP, DSC 150Mhz/300MMACS 150Mhz EFCOP RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT
DSP56311VF150B1 功能描述:数字信号处理器和控制器 - DSP, DSC 24 BIT DSP RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT
DSP56311VF150R2 功能描述:数字信号处理器和控制器 - DSP, DSC 24 BIT DSP RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT